TDC: enabling for electronics of the future

Nowadays, TDC systems are the landmark for determining the time instants at which digital events take place; the philosophy of representing information as the difference between instants of time, rather than voltage values, is the base of the latest generation Time-Mode digital electronics.

In this sense, TDCs are today enabling technologies for Industry 4.0, Health and Smart Mobility.

Latest generations of FPGA and SoC devices are characterized by lower and lower propagation delays, that make feasible the realization of high-resolution and high-rate TDCs. With the achieved performance and flexibility, FPGA-based TDCs are enabling technologies for time-based experiments, where physical quantities are, generally, investigated by converting them into time intervals to be measured, finding application in Time-of-Flight (ToF) measurements, Time-Correlated Single Photon Counting (TCSPC), Time-of-Flight Laser Raging (ToFLR) and Time-of-Flight Positron Emission Tomography (ToF-PET), just to name a few.

The variability of the features operating in different systems, together with the pressing request of fast–prototyping at low Non-Recursive Engineering (NRE) costs, directs the research towards all–programmable TDCs. The design of high–performance, FPGA–based TDCs forces to forsake the traditional and synchronous digital design, moving to asynchronous architectures that can process up to the Tera samples per second range. In this sense, the development of innovative “Terahertz electronics” is one of the main objectives for TEDIEL.

TEDIEL has consolidated fully-FPGA based TDC instruments with performance matching the state-of-the-art, which is represented by ASIC solutions, offering also complete programmability of the operating features as well as number of channels, multi-hit operating mode, the possibility to very finely set of the functional characteristics of the circuit and to implement proper post-processing algorithms on the same chip of the TDC, high processing speed and lower migration costs towards device generations of more modern technology. Our TDC systems provide more than ten channels operating in parallel with resolution (LSB) of 250 fs over a full-scale range of some seconds, single shot precision below 10 ps r.m.s. at acquisition rate up to 200 Msps, dead–time lower than 2.5 ns for each channel, and differential and integral non–linearity (DNL, INL) below 85 fs and 5.6 ps respectively, which are figures of merit necessary for high-precision and fast multi-hit applications. Input events coming from detectors (e.g., CDL, SiPM, SPAD, PMT, …) are converted, by means of constant fraction discriminators or programmable threshold comparators, into digital pulses that are fully processed by the TDC on FPGA.

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